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ORIC

FPGA and RSD ECC Point Multiplication Accelerators

Finite Field arithmetic (FFA) primitives are the bottleneck in Point Multiplication (PM) operation in ECC. This project explores both circuit and system levels to optimize different FFA operations. At the circuit level to reduce the long carry propagation delay, a Redundant-Signed-Digit (RSD) based approach is adopted which somehow facilitates the carry free operations. At the system level, different coordinates systems and PM algorithms were deeply examined and modified according to the project requirements. The designs are proposed for different category of elliptic curves and different security levels. The targeted curves are general, NIST and more recent famous Curve448 and Curve255. These novel designs are synthesized and implemented on different Field Programmable Gate Array (FPGA) platforms. The implementation results reveal that the proposed designs outperform almost all of the existing state of the art designs.