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ORIC

Efficient Hardware Architectures for Scalar Multiplication on Elliptic Curves

Suitable cryptographic protocols are required to meet the growing demands of data security in many different systems, ranging from large servers to small hand-held devices. Many constraints such as computation time, silicon area, power consumption, and security level must be considered by the designers. Elliptic curve cryptography (ECC) due to its higher security strength per bit, ECC based crypto-systems are better in terms of the bandwidth utilization, power consumption, implementation cost and are considered as an excellent choice in future hand-held and IoT devices. However, underlying computational intensive mathematical operations in ECC restrict its deployment in many applications. This work proposed many interesting and novel high-speed flexible ECC hardware architectures. The proposed designs provided excellent tradeoffs between throughput and hardware resource consumption. In addition, these designs also have resistance to many side channel attacks and can be deployed where there is a threat of physical security.